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SEMICONDUCTOR TECHNICAL DATA
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The RF MOSFET Line
RF Power Field-Effect Transistor
N-Channel Enhancement-Mode MOSFET
Designed for broadband commercial and military applications at frequencies to 175 MHz. The high power, high gain and broadband performance of this device makes possible solid state transmitters for FM broadcast or TV channel frequency bands. * Guaranteed Performance at 30 MHz, 50 V: Output Power -- 150 W Gain -- 18 dB (22 dB Typ) Efficiency -- 40% * Typical Performance at 175 MHz, 50 V: Output Power -- 150 W Gain -- 13 dB * Low Thermal Resistance * Ruggedness Tested at Rated Output Power * Nitride Passivated Die for Enhanced Reliability
D
MRF151
150 W, 50 V, 175 MHz N-CHANNEL BROADBAND RF POWER MOSFET
G CASE 211-11, STYLE 2 S
MAXIMUM RATINGS
Rating Drain-Source Voltage Drain-Gate Voltage Gate-Source Voltage Drain Current -- Continuous Total Device Dissipation @ TC = 25C Derate above 25C Storage Temperature Range Operating Junction Temperature Symbol VDSS VDGO VGS ID PD Tstg TJ Value 125 125 40 16 300 1.71 - 65 to +150 200 Unit Vdc Vdc Vdc Adc Watts W/C C C
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance, Junction to Case Symbol RJC Max 0.6 Unit C/W
NOTE -- CAUTION -- MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed.
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ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage (VGS = 0, ID = 100 mA) Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) Gate-Body Leakage Current (VGS = 20 V, VDS = 0) V(BR)DSS IDSS IGSS 125 -- -- -- -- -- -- 5.0 1.0 Vdc mAdc Adc
ON CHARACTERISTICS
Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) Drain-Source On-Voltage (VGS = 10 V, ID = 10 A) Forward Transconductance (VDS = 10 V, ID = 5.0 A) VGS(th) VDS(on) gfs 1.0 1.0 5.0 3.0 3.0 7.0 5.0 5.0 -- Vdc Vdc mhos
DYNAMIC CHARACTERISTICS
Input Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Output Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Ciss Coss Crss -- -- -- 350 220 15 -- -- -- pF pF pF
FUNCTIONAL TESTS
Common Source Amplifier Power Gain, f = 30; 30.001 MHz (VDD = 50 V, Pout = 150 W (PEP), IDQ = 250 mA) f = 175 MHz Drain Efficiency (VDD = 50 V, Pout = 150 W (PEP), f = 30; 30.001 MHz, ID (Max) = 3.75 A) Intermodulation Distortion (1) (VDD = 50 V, Pout = 150 W (PEP), f = 30 MHz, f2 = 30.001 MHz, IDQ = 250 mA) Load Mismatch (VDD = 50 V, Pout = 150 W (PEP), f1 = 30; 30.001 MHz, IDQ = 250 mA, VSWR 30:1 at all Phase Angles) Gps 18 -- 40 22 13 45 -- -- -- dB %
dB IMD(d3) IMD(d11) No Degradation in Output Power -- -- - 32 - 60 - 30 --
CLASS A PERFORMANCE
Intermodulation Distortion (1) and Power Gain (VDD = 50 V, Pout = 50 W (PEP), f1 = 30 MHz, f2 = 30.001 MHz, IDQ = 3.0 A) GPS IMD(d3) IMD(d9 - 13) -- -- -- 23 - 50 - 75 -- -- -- dB
NOTE: 1. To MIL-STD-1311 Version A, Test Method 2204B, Two Tone, Reference Each Tone. BIAS + 0 - 12 V - + C8 T2 C4 L2 C9 + - C10 - RF OUTPUT
L1 C5 C6 C7
50 V
R1 RF INPUT T1 C1 R3 C2
D.U.T.
R2
C3
C1 -- 470 pF Dipped Mica C2, C5, C6, C7, C8, C9 -- 0.1 F Ceramic Chip or Monolythic with Short Leads C3 -- 200 pF Unencapsulated Mica or Dipped Mica with Short Leads C4 -- 15 pF Unencapsulated Mica or Dipped Mica with Short Leads C10 -- 10 F/100 V Electrolytic
L1 -- VK200/4B Ferrite Choke or Equivalent, 3.0 H L2 -- Ferrite Bead(s), 2.0 H R1, R2 -- 51 /1.0 W Carbon R3 -- 3.3 /1.0 W Carbon (or 2.0 x 6.8 /1/2 W in Parallel) T1 -- 9:1 Broadband Transformer T2 -- 1:9 Broadband Transformer Board Material -- 0.062 Fiberglass (G10), 1 oz. Copper Clad, 2 Sides, er = 5
Figure 1. 30 MHz Test Circuit
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RFC2 +50 V +
C10 BIAS 0 - 12 V R1 C4 + C5 R3 D.U.T. L3 L2 L4
C11
C9 RF OUTPUT
C1 RF INPUT
L1 C6 C2 C3 R2 C7 C8
C1, C2, C8 -- Arco 463 or equivalent C3 -- 25 pF, Unelco C4 -- 0.1 F, Ceramic C5 -- 1.0 F, 15 WV Tantalum C6 -- 15 pF, Unelco J101 C7 -- 25 pF, Unelco J101 C9 -- Arco 262 or equivalent C10 -- 0.05 F, Ceramic C11 -- 15 F, 60 WV Electrolytic D1 -- 1N5347 Zener Diode
L1 -- 3/4, #18 AWG into Hairpin L2 -- Printed Line, 0.200 x 0.500 L3 -- 1, #16 AWG into Hairpin L4 -- 2 Turns, #16 AWG, 5/16 ID RFC1 -- 5.6 H, Choke RFC2 -- VK200-4B R1 -- 150 , 1.0 W Carbon R2 -- 10 k, 1/2 W Carbon R3 -- 120 , 1/2 W Carbon Board Material -- 0.062 Fiberglass (G10), 1 oz. Copper Clad, 2 Sides, r = 5.0
Figure 2. 175 MHz Test Circuit
TYPICAL CHARACTERISTICS
1000 500 C, CAPACITANCE (pF) 200 100 50 Crss 20 0 Ciss Coss VGS , DRAIN-SOURCE VOLTAGE (NORMALIZED) 1.04 1.03 1.02 1.01 1 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.9 - 25
1D = 5 A 4A
2A 1A 250 mA 100 mA 25 50 75 TC, CASE TEMPERATURE (C)
0
10 20 30 40 VDS, DRAIN-SOURCE VOLTAGE (VOLTS)
50
0
100
Figure 3. Capacitance versus Drain-Source Voltage
Figure 4. Gate-Source Voltage versus Case Temperature
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TYPICAL CHARACTERISTICS
100 f T, UNITY GAIN FREQUENCY (MHz) 2000 VDS = 30 V
I D, DRAIN CURRENT (AMPS)
VDS = 15 V
10
1000
TC = 25C 1
2
20 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
200
0
0
2
4
8 12 6 10 14 ID, DRAIN CURRENT (AMPS)
16
18
20
Figure 5. DC Safe Operating Area
Figure 6. Common Source Unity Gain Frequency versus Drain Current
30 Pout , OUTPUT POWER (WATTS)
300 200 100 0 300 200 100 10 30 f, FREQUENCY (MHz) 100 200 0 0 1 2 3 Pin, INPUT POWER (WATTS) VDD = 50 V 40 V f = 30 MHz IDQ = 250 mA 4 5 0 5 10 15 VDD = 50 V f = 175 MHz IDQ = 250 mA 20 25
25 GPS, POWER GAIN (dB)
20
15 VDD = 50 V IDQ = 250 mA Pout = 150 W 2 5
10
5
Figure 7. Power Gain versus Frequency
Figure 8. Output Power versus Input Power
25 IMD, INTERMODULATION DISTORTION d3 35 45 55 VDD = 50 V, f = 30 MHz, TONE SEPARATION = 1 kHz 25 35 d3 45 55 0 20 40 d5 IDQ = 500 mA 180 200 d5 IDQ = 250 mA
60 100 120 140 160 80 Pout, OUTPUT POWER (WATTS PEP)
Figure 9. IMD versus Pout
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f MHz
240 230 220 210 200 190 180 170 160 150 140 130 120 100 110 90 80 70 60 50 40 30
0.970 0.971 0.969 0.967 0.967 0.964 0.962 0.960 0.957 0.954 0.950 0.946 0.942 0.936 0.932 0.925 0.918 0.912 0.902 0.895 0.886 0.877 |S11|
S11
Table 1. Common Source S-Parameters (VDS = 50 V, ID = 2 A)
-180
-180
-179
-179
-178
-178
-177
-177
-177
-176
-176
-175
-175
-174
177 178 178 178 179 179 179 180
Figure 10. Series Equivalent Impedance
7.5
10.10
|S21|
15
0.57 0.60 0.67 0.71 0.75 0.84 0.90 1.01 1.13 1.23 1.39 1.55 1.77 2.06 2.34 2.69 3.19 3.86 4.73 5.76 7.47 30
15
100
30
7.5
4
150
4
S21
Zin
2
100
150
ZOL*
2
f = 175 MHz
12 12 14 16 18 19 20 22 24 27 30 32 35 37 40 45 48 52 58 63 69 77
f = 175 MHz
NOTE: Gate Shunted by 25 Ohms.
ZOL* = Conjugate of the optimum load impedance ZOL* = into which the device output operates at a ZOL* = given output power, voltage and frequency.
VDD = 50 V IDQ = 250 mA Pout = 150 W
Zo = 10
0.037 0.038 0.035 0.032 0.030 0.028 0.026 0.024 0.023 0.021 0.019 0.017 0.015 0.014 0.013 0.010 0.009 0.009 0.008 0.009 0.008 0.011 |S12|
S12
80 81 82 80 79 80 82 82 79 78 77 77 76 72 67 62 54 46 39 33 24 19
0.950 0.950 0.949 0.937 0.922 0.929 0.931 0.904 0.909 0.884 0.874 0.875 0.865 0.850 0.808 0.802 0.784 0.764 0.756 0.715 0.707 0.911 |S22|
S22
-180
-179
-178
-176
-177
-176
-175
-174
-172
-173
-175
-173
-171
-171
-172
-171
-171
-172
-169
179 179 180
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f MHz 500 490 480 470 460 450 440 430 420 410 400 390 380 370 360 350 340 330 320 310 300 290 280 270 260 250 0.972 0.973 0.974 0.978 0.978 0.978 0.976 0.976 0.977 0.976 0.976 0.977 0.976 0.976 0.977 0.975 0.976 0.975 0.974 0.976 0.975 0.974 0.974 0.972 0.973 0.972 |S11|
6
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Table 1. Common Source S-Parameters (VDS = 50 V, ID = 2 A) continued
S11
169 169 170 170 170 171 171 171 172 172 172 173 173 173 174 174 174 174 175 175 176 176 176 176 177 177
|S21|
0.17 0.17 0.18 0.18 0.18 0.19 0.20 0.19 0.21 0.22 0.23 0.24 0.26 0.26 0.28 0.29 0.30 0.31 0.33 0.36 0.39 0.40 0.41 0.45 0.47 0.51
S21
14 13 13 10 13 10 12 10 10 10 10 12 11 9 9 7 7 8 8 7 4 7 9 6 9 9
0.089 0.086 0.085 0.081 0.082 0.080 0.075 0.073 0.071 0.071 0.068 0.066 0.065 0.061 0.059 0.058 0.056 0.056 0.053 0.049 0.048 0.046 0.046 0.044 0.041 0.039 |S12|
S12
73 75 78 77 74 77 75 76 76 77 80 76 75 76 79 80 77 78 78 82 82 79 80 80 79 80
0.980 0.966 0.944 0.953 0.990 0.982 0.953 0.950 0.962 0.999 0.955 0.960 0.944 0.981 0.978 0.950 0.948 0.935 0.954 0.943 0.929 0.944 0.965 0.953 0.954 0.935 |S22|
S22
165 165 167 168 165 168 168 168 168 170 173 171 171 170 172 174 172 172 173 176 176 175 175 176 178 179
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between the terminals. The metal anode gate structure determines the capacitors from gate-to-drain (Cgd), and gate- to-source (C gs ). The PN junction formed during the fabrication of the MOSFET results in a junction capacitance from drain-to-source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter-terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case the numbers are lower. However, neither method represents the actual operating conditions in RF applications.
DRAIN Cgd GATE Cds Cgs Ciss = Cgd = Cgs Coss = Cgd = Cds Crss = Cgd
ing should be avoided. These conditions can result in turn- on of the device due to voltage build-up on the input capacitor due to leakage currents or pickup. Gate Protection -- This device does not have an internal monolithic zener diode from gate-to-source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate-to-source impedance low also helps damp transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate-drain capacitance. If the gate-to-source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate-threshold voltage and turn the device on. HANDLING CONSIDERATIONS When shipping, the devices should be transported only in antistatic bags or conductive foam. Upon removal from the packaging, careful handling procedures should be adhered to. Those handling the devices should wear grounding straps and devices not in the antistatic packaging should be kept in metal tote bins. MOSFETs should be handled by the case and not by the leads, and when testing the device, all leads should make good electrical contact before voltage is applied. As a final note, when placing the FET into the system it is designed for, soldering should be done with a grounded iron. DESIGN CONSIDERATIONS The MRF151 is an RF Power, MOS, N-channel enhancement mode field-effect transistor (FET) designed for HF and VHF power amplifier applications. M/A-COM Application Note AN211A, FETs in Theory and Practice, is suggested reading for those not familiar with the construction and characteristics of FETs. The major advantages of RF power MOSFETs include high gain, low noise, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can be varied over a wide range with a low power dc control signal. DC BIAS The MRF151 is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied. Drain current flows when a positive voltage is applied to the gate. RF power FETs require forward bias for optimum performance. The value of quiescent drain current (IDQ) is not critical for many applications. The MRF151 was characterized at IDQ = 250 mA, each side, which is the suggested minimum value of IDQ. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may be just a simple resistive divider network. Some applications may require a more elaborate bias system. GAIN CONTROL Power output of the MRF151 may be controlled from its rated value down to zero (negative gain) by varying the dc gate voltage. This feature facilitates the design of manual gain control, AGC/ALC and modulation systems.
SOURCE
LINEARITY AND GAIN CHARACTERISTICS In addition to the typical IMD and power gain data presented, Figure 6 may give the designer additional information on the capabilities of this device. The graph represents the small signal unity current gain frequency at a given drain current level. This is equivalent to fT for bipolar transistors. Since this test is performed at a fast sweep speed, heating of the device does not occur. Thus, in normal use, the higher temperatures may degrade these characteristics to some extent. DRAIN CHARACTERISTICS One figure of merit for a FET is its static resistance in the full-on condition. This on-resistance, VDS(on), occurs in the linear region of the output characteristic and is specified under specific test conditions for gate-source voltage and drain current. For MOSFETs, VDS(on) has a positive temperature coefficient and constitutes an important design consideration at high temperatures, because it contributes to the power dissipation within the device. GATE CHARACTERISTICS The gate of the MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input resistance is very high -- on the order of 109 ohms -- resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage slightly in excess of the gate-to-source threshold voltage, VGS(th). Gate Voltage Rating -- Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination -- The gate of this device is essentially capacitor. Circuits that leave the gate open-circuited or floatREV 9
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PACKAGE DIMENSIONS
A U M
1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH.
Q
M
4
R
B
2
3
D K J H C E
SEATING PLANE
DIM A B C D E H J K M Q R U
INCHES MIN MAX 0.960 0.990 0.465 0.510 0.229 0.275 0.216 0.235 0.084 0.110 0.144 0.178 0.003 0.007 0.435 --- 45 _NOM 0.115 0.130 0.246 0.255 0.720 0.730
MILLIMETERS MIN MAX 24.39 25.14 11.82 12.95 5.82 6.98 5.49 5.96 2.14 2.79 3.66 4.52 0.08 0.17 11.05 --- 45 _NOM 2.93 3.30 6.25 6.47 18.29 18.54
STYLE 2: PIN 1. 2. 3. 4.
SOURCE GATE SOURCE DRAIN
CASE 211-11 ISSUE N
Specifications subject to change without notice. n North America: Tel. (800) 366-2266, Fax (800) 618-8883 n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298 n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020
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